A DC-DC converter configured using a plurality of coil components can feed as large a current as 20 A or 30 A, in spite of a small size. Therefore, it has come to be arranged on a board as the power source of a CPU.
In recent years, an LSI or the like has lowered a drive voltage for the purpose of power consumption reduction. With the lowering of the drive voltage, a required current has come to reach several tens of ampere, and a voltage drop in a section from the output terminal of the DC-DC converter to the power source terminal of the CPU or the LSI has become problematic. In order to solve the problem, the DC-DC converter has come to be located as near to the CPU or the LSI as possible. As a result, components of small size and low height have been required of the constituents of the DC-DC converter.
On the other hand, the DC-DC converter which is configured on the board has necessitated a current quantity which cannot be supplied by one FET and one choke coil, with the increase of an output current. A multiphase scheme has been adopted for solving this problem.
By way of example, in the multiphase scheme employing 2-phase converters and having an output of 30 A, the two DC-DC converters are built such that each of these converters is configured of an FET and a choke coil which have an output capacity of 15 A in terms of an effective value, and that one smoothing capacitor is shared. On/off timings in the respective FETs are shifted a half cycle in order to prevent the on/off timings from coinciding, thereby to generate DC voltages—currents by the single capacitor.
A problem in the multiphase scheme is that the number of components such as the FETs and the choke coils is doubled. Each of the components becomes smaller because a current capacity is halved. However, a substantial mounting area increases more due to the increase of the number of components. This has resulted in the problem that such DC-DC converters are not appropriate as ones on the board that originally require miniaturization.
A DC-DC converter using a coupling inductor, in a new circuit scheme proposed in order to solve this problem, is disclosed in IEEE TRANSACTION ON POWER ELECTRONICS, VOL. 16, NO. 4, JULY 2001, “Performance Improvements of Interleaving VRMs with Coupling Inductor.” With the inductor disclosed here, two inductors are configured by one EI-type core, and the magnitude of an inductance is adjusted by providing a gap. The desired operation of the DC-DC converter employing the inductor has been confirmed. However, the inductor used here has had the problem that, on account of a structure in which windings are wound round outer legs, the windings protrude outside the core, so the geometries of the inductor become large. Besides, the structure in which the windings are wound round the outer legs has the problem that a limitation is imposed on decreasing the DC resistance value of the winding. The structure of this type in which the windings are wound round is also disclosed in Japanese Unexamined Patent Application Publications (JP-A) Nos. H7-240319 and H11-195536.